SEALSQ and Lattice Collaborate to Deliver Unified TPM-FPGA Architecture for Post-Quantum Security

By combining Lattice’s expertise in low power programmable FPGAs and recognized leadership in security with SEALSQ's specialized post-quantum capabilities, this collaboration demonstrates technical ...
IEEE

FPGA based timing calibration scheme for embedded EFUSE

Abstract: This paper first introduces the influence of process parameter fluctuation on FPGA interconnect timing. Then, according to the characteristics of FPGA architecture and the implementation ...
IEEE

Parametric Pipelined k-Means Implementation for Hyperspectral Processing on Spacecraft Embedded FPGA

Abstract: k-means stands out as one of the most common clustering algorithms, widely employed for classification in hyperspectral imaging. In this context, large amounts of data are gathered by ...