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IEEE

A 6-GS/s 8-bit Time-Domain ADC With Selection-First Pipelined Successive Approximation Register TDC in 28-nm CMOS Technology

Abstract: This brief presents a single-channel 8-bit time-domain analog-to-digital converter (TD-ADC) that employs a selection-first successive approximation register (SAR) time-to-digital converter ...
IEEE

A Multiply-and-Accumulate SAR-ADC-Based Hybrid Slepian Beamformer

Abstract: This article introduces a hybrid Slepian beamforming receiver architecture with low power and area costs. Traditional large-scale true-time-delay (TTD) beamformers for wideband wireless ...